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Arch/i386/kernel/time.c


5393 /* 5394 * linux/arch/i386/kernel/time.c 5395 * 5396 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 5397 * 5398 * This file contains the PC-specific time handling 5399 * details: reading the RTC at bootup, etc.. 5400 * 1994-07-02 Alan Modra 5401 * fixed set_rtc_mmss, fixed time.year for >= 2000, 5402 * new mktime 5403 * 1995-03-26 Markus Kuhn 5404 * fixed 500 ms bug at call to set_rtc_mmss, fixed 5405 * DS12887 precision CMOS clock update 5406 * 1996-05-03 Ingo Molnar 5407 * fixed time warps in 5408 * do_[slow|fast]_gettimeoffset() 5409 * 1997-09-10 Updated NTP code according to technical 5410 * memorandum Jan '96 "A Kernel Model for Precision 5411 * Timekeeping" by Dave Mills 5412 * 1998-09-05 (Various) More robust 5413 * do_fast_gettimeoffset() algorithm implemented 5414 * (works with APM, Cyrix 6x86MX and Centaur C6), 5415 * monotonic gettimeofday() with 5416 * fast_get_timeoffset(), drift-proof precision TSC 5417 * calibration on boot (C. Scott Ananian 5418 * <cananian@alumni.princeton.edu>, Andrew D. Balsa 5419 * <andrebalsa@altern.org>, Philip Gladstone 5420 * <philip@raptor.com>; ported from 2.0.35 Jumbo-9 5421 * by Michael Krause <m.krause@tu-harburg.de>). 5422 * 1998-12-16 Andrea Arcangeli 5423 * Fixed Jumbo-9 code in 2.1.131: do_gettimeofday 5424 * was missing 1 jiffy because was not accounting 5425 * lost_ticks. 5426 * 1998-12-24 Copyright (C) 1998 Andrea Arcangeli 5427 * Fixed a xtime SMP race (we need the xtime_lock rw 5428 * spinlock to serialize accesses to 5429 * xtime/lost_ticks). 5430 */ 5431 5432 #include <linux/errno.h> 5433 #include <linux/sched.h> 5434 #include <linux/kernel.h> 5435 #include <linux/param.h> 5436 #include <linux/string.h> 5437 #include <linux/mm.h> 5438 #include <linux/interrupt.h> 5439 #include <linux/time.h> 5440 #include <linux/delay.h> 5441 #include <linux/init.h> 5442 #include <linux/smp.h> 5443 5444 #include <asm/processor.h> 5445 #include <asm/uaccess.h> 5446 #include <asm/io.h> 5447 #include <asm/irq.h> 5448 #include <asm/delay.h> 5449 5450 #include <linux/mc146818rtc.h> 5451 #include <linux/timex.h> 5452 #include <linux/config.h> 5453 5454 #include <asm/fixmap.h> 5455 #include <asm/cobalt.h> 5456 5457 /* for x86_do_profile() */ 5458 #include "irq.h" 5459 5460 5461 /* Detected as we calibrate the TSC */ 5462 unsigned long cpu_hz; 5463 5464 /* Number of usecs that the last interrupt was delayed */ 5465 static int delay_at_last_interrupt; 5466 5467 /* lsb 32 bits of Time Stamp Counter */ 5468 static unsigned long last_tsc_low; 5469 5470 /* Cached *multiplier* to convert TSC counts to 5471 * microseconds. (see the equation below). Equal to 5472 * 2^32 * (1 / (clocks per usec) ). Initialized in 5473 * time_init. */ 5474 static unsigned long fast_gettimeoffset_quotient=0; 5475 5476 extern rwlock_t xtime_lock; 5477 5478 static inline unsigned long do_fast_gettimeoffset(void) 5479 { 5480 register unsigned long eax asm("ax"); 5481 register unsigned long edx asm("dx"); 5482 5483 /* Read the Time Stamp Counter */ 5484 __asm__("rdtsc" 5485 :"=a" (eax), "=d" (edx)); 5486 5487 /* .. relative to previous jiffy (32 bits is enough) */ 5488 eax -= last_tsc_low; /* tsc_low delta */ 5489 5490 /* Time offset 5491 * = (tsc_low delta) * fast_gettimeoffset_quotient 5492 * = (tsc_low delta) * (usecs_per_clock) 5493 * = (tsc_low delta) * (usecs_per_jiffy / 5494 * clocks_per_jiffy) 5495 * Using a mull instead of a divl saves up to 31 clock 5496 * cycles in the critical path. */ 5497 5498 __asm__("mull %2" 5499 :"=a" (eax), "=d" (edx) 5500 :"g" (fast_gettimeoffset_quotient), 5501 "0" (eax)); 5502 5503 /* our adjusted time offset in microseconds */ 5504 return delay_at_last_interrupt + edx; 5505 } 5506 5507 #define TICK_SIZE tick 5508 5509 #ifndef CONFIG_X86_TSC 5510 5511 /* This function must be called with interrupts disabled 5512 * It was inspired by Steve McCanne's microtime-i386 for 5513 * BSD. -- jrs 5514 * 5515 * However, the pc-audio speaker driver changes the 5516 * divisor so that it gets interrupted rather more often 5517 * - it loads 64 into the counter rather than 11932! This 5518 * has an adverse impact on do_gettimeoffset() -- it 5519 * stops working! What is also not good is that the 5520 * interval that our timer function gets called is no 5521 * longer 10.0002 ms, but 9.9767 ms. To get around this 5522 * would require using a different timing source. Maybe 5523 * someone could use the RTC - I know that this can 5524 * interrupt at frequencies ranging from 8192Hz to 5525 * 2Hz. If I had the energy, I'd somehow fix it so that 5526 * at startup, the timer code in sched.c would select 5527 * using either the RTC or the 8253 timer. The decision 5528 * would be based on whether there was any other device 5529 * around that needed to trample on the 8253. I'd set up 5530 * the RTC to interrupt at 1024 Hz, and then do some 5531 * jiggery to have a version of do_timer that advanced 5532 * the clock by 1/1024 s. Every time that reached over 5533 * 1/100 of a second, then do all the old code. If the 5534 * time was kept correct then do_gettimeoffset could just 5535 * return 0 - there is no low order divider that can be 5536 * accessed. 5537 * 5538 * Ideally, you would be able to use the RTC for the 5539 * speaker driver, but it appears that the speaker driver 5540 * really needs interrupt more often than every 120 us or 5541 * so. 5542 * 5543 * Anyway, this needs more thought.... pjsg (1993-08-28) 5544 * 5545 * If you are really that interested, you should be 5546 * reading comp.protocols.time.ntp! */ 5547 static unsigned long do_slow_gettimeoffset(void) 5548 { 5549 int count; 5550 5551 /* for the first call after boot */ 5552 static int count_p = LATCH; 5553 static unsigned long jiffies_p = 0; 5554 5555 /* cache volatile jiffies temporarily; we have IRQs 5556 * turned off. */ 5557 unsigned long jiffies_t; 5558 5559 /* timer count may underflow right here */ 5560 outb_p(0x00, 0x43); /* latch the count ASAP */ 5561 5562 count = inb_p(0x40); /* read the latched count */ 5563 5564 /* We do this guaranteed double memory access instead 5565 * of a _p postfix in the previous port access. Wheee, 5566 * hackady hack */ 5567 jiffies_t = jiffies; 5568 5569 count |= inb_p(0x40) << 8; 5570 5571 /* avoiding timer inconsistencies (they are rare, but 5572 * they happen)... there are two kinds of problems 5573 * that must be avoided here: 1. the timer counter 5574 * underflows 2. hardware problem with the timer, not 5575 * giving us continuous time, the counter does small 5576 * "jumps" upwards on some Pentium systems, (see c't 5577 * 95/10 page 335 for Neptune bug.) */ 5578 5579 /* you can safely undefine this if you don't have the 5580 * Neptune chipset */ 5581 5582 #define BUGGY_NEPTUN_TIMER 5583 5584 if( jiffies_t == jiffies_p ) { 5585 if( count > count_p ) { 5586 /* the nutcase */ 5587 5588 outb_p(0x0A, 0x20); 5589 5590 /* assumption about timer being IRQ1 */ 5591 if( inb(0x20) & 0x01 ) { 5592 /* We cannot detect lost timer interrupts ... 5593 * well, that's why we call them lost, don't we? 5594 * :) [hmm, on the Pentium and Alpha we can 5595 * ... sort of] */ 5596 count -= LATCH; 5597 } else { 5598 #ifdef BUGGY_NEPTUN_TIMER 5599 /* for the Neptun bug we know that the 'latch' 5600 * command doesnt latch the high and low value of 5601 * the counter atomically. Thus we have to 5602 * substract 256 from the counter ... funny, 5603 * isn't it? :) */ 5604 5605 count -= 256; 5606 #else 5607 printk("do_slow_gettimeoffset(): " 5608 "hardware timer problem?\n"); 5609 #endif 5610 } 5611 } 5612 } else 5613 jiffies_p = jiffies_t; 5614 5615 count_p = count; 5616 5617 count = ((LATCH-1) - count) * TICK_SIZE; 5618 count = (count + LATCH/2) / LATCH; 5619 5620 return count; 5621 } 5622 5623 static unsigned long (*do_gettimeoffset)(void) = 5624 do_slow_gettimeoffset; 5625 5626 #else 5627 5628 #define do_gettimeoffset() do_fast_gettimeoffset() 5629 5630 #endif 5631 5632 /* This version of gettimeofday has microsecond 5633 * resolution and better than microsecond precision on 5634 * fast x86 machines with TSC. */ 5635 void do_gettimeofday(struct timeval *tv) 5636 { 5637 extern volatile unsigned long lost_ticks; 5638 unsigned long flags; 5639 unsigned long usec, sec; 5640 5641 read_lock_irqsave(&xtime_lock, flags); 5642 usec = do_gettimeoffset(); 5643 { 5644 unsigned long lost = lost_ticks; 5645 if (lost) 5646 usec += lost * (1000000 / HZ); 5647 } 5648 sec = xtime.tv_sec; 5649 usec += xtime.tv_usec; 5650 read_unlock_irqrestore(&xtime_lock, flags); 5651 5652 while (usec >= 1000000) { 5653 usec -= 1000000; 5654 sec++; 5655 } 5656 5657 tv->tv_sec = sec; 5658 tv->tv_usec = usec; 5659 } 5660 5661 void do_settimeofday(struct timeval *tv) 5662 { 5663 write_lock_irq(&xtime_lock); 5664 /* This is revolting. We need to set the xtime.tv_usec 5665 * correctly. However, the value in this location is 5666 * is value at the last tick. 5667 * Discover what correction gettimeofday 5668 * would have done, and then undo it! 5669 */ 5670 tv->tv_usec -= do_gettimeoffset(); 5671 5672 while (tv->tv_usec < 0) { 5673 tv->tv_usec += 1000000; 5674 tv->tv_sec--; 5675 } 5676 5677 xtime = *tv; 5678 time_adjust = 0; /* stop active adjtime() */ 5679 time_status |= STA_UNSYNC; 5680 time_maxerror = NTP_PHASE_LIMIT; 5681 time_esterror = NTP_PHASE_LIMIT; 5682 write_unlock_irq(&xtime_lock); 5683 } 5684 5685 /* In order to set the CMOS clock precisely, set_rtc_mmss 5686 * has to be called 500 ms after the second nowtime has 5687 * started, because when nowtime is written into the 5688 * registers of the CMOS clock, it will jump to the next 5689 * second precisely 500 ms later. Check the Motorola 5690 * MC146818A or Dallas DS12887 data sheet for details. 5691 * 5692 * BUG: This routine does not handle hour overflow 5693 * properly; it just sets the minutes. Usually you'll 5694 * only notice that after reboot! */ 5695 static int set_rtc_mmss(unsigned long nowtime) 5696 { 5697 int retval = 0; 5698 int real_seconds, real_minutes, cmos_minutes; 5699 unsigned char save_control, save_freq_select; 5700 5701 /* tell the clock it's being set */ 5702 save_control = CMOS_READ(RTC_CONTROL); 5703 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL); 5704 5705 /* stop and reset prescaler */ 5706 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); 5707 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), 5708 RTC_FREQ_SELECT); 5709 5710 cmos_minutes = CMOS_READ(RTC_MINUTES); 5711 if (!(save_control & RTC_DM_BINARY) RTC_ALWAYS_BCD) 5712 BCD_TO_BIN(cmos_minutes); 5713 5714 /* since we're only adjusting minutes and seconds, 5715 * don't interfere with hour overflow. This avoids 5716 * messing with unknown time zones but requires your 5717 * RTC not to be off by more than 15 minutes */ 5718 real_seconds = nowtime % 60; 5719 real_minutes = nowtime / 60; 5720 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1) 5721 real_minutes += 30; /* correct for 1/2-hour tzone */ 5722 real_minutes %= 60; 5723 5724 if (abs(real_minutes - cmos_minutes) < 30) { 5725 if (!(save_control & RTC_DM_BINARY) 5726 RTC_ALWAYS_BCD) { 5727 BIN_TO_BCD(real_seconds); 5728 BIN_TO_BCD(real_minutes); 5729 } 5730 CMOS_WRITE(real_seconds,RTC_SECONDS); 5731 CMOS_WRITE(real_minutes,RTC_MINUTES); 5732 } else { 5733 printk(KERN_WARNING 5734 "set_rtc_mmss: can't update from %d to %d\n", 5735 cmos_minutes, real_minutes); 5736 retval = -1; 5737 } 5738 5739 /* The following flags have to be released exactly in 5740 * this order, otherwise the DS12887 (popular MC146818A 5741 * clone with integrated battery and quartz) will not 5742 * reset the oscillator and will not update precisely 5743 * 500 ms later. You won't find this mentioned in the 5744 * Dallas Semiconductor data sheets, but who believes 5745 * data sheets anyway ... -- Markus Kuhn */ 5746 CMOS_WRITE(save_control, RTC_CONTROL); 5747 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT); 5748 5749 return retval; 5750 } 5751 5752 /* last time the cmos clock got updated */ 5753 static long last_rtc_update = 0; 5754 5755 /* timer_interrupt() needs to keep up the real-time 5756 * clock, as well as call the "do_timer()" routine every 5757 * clocktick */ 5758 static inline void do_timer_interrupt(int irq, 5759 void *dev_id, struct pt_regs *regs) 5760 { 5761 #ifdef CONFIG_VISWS 5762 /* Clear the interrupt */ 5763 co_cpu_write(CO_CPU_STAT, 5764 co_cpu_read(CO_CPU_STAT) & ~CO_STAT_TIMEINTR); 5765 #endif 5766 do_timer(regs); 5767 /* In the SMP case we use the local APIC timer interrupt 5768 * to do the profiling, except when we simulate SMP mode 5769 * on a uniprocessor system, in that case we have to call 5770 * the local interrupt handler. */ 5771 #ifndef __SMP__ 5772 if (!user_mode(regs)) 5773 x86_do_profile(regs->eip); 5774 #else 5775 if (!smp_found_config) 5776 smp_local_timer_interrupt(regs); 5777 #endif 5778 5779 /* If we have an externally synchronized Linux clock, 5780 * then update CMOS clock accordingly every ~11 5781 * minutes. Set_rtc_mmss() has to be called as close as 5782 * possible to 500 ms before the new second starts. */ 5783 if ((time_status & STA_UNSYNC) == 0 && 5784 xtime.tv_sec > last_rtc_update + 660 && 5785 xtime.tv_usec >= 500000 - ((unsigned) tick) / 2 && 5786 xtime.tv_usec <= 500000 + ((unsigned) tick) / 2) { 5787 if (set_rtc_mmss(xtime.tv_sec) == 0) 5788 last_rtc_update = xtime.tv_sec; 5789 else /* do it again in 60 s */ 5790 last_rtc_update = xtime.tv_sec - 600; 5791 } 5792 5793 #ifdef CONFIG_MCA 5794 if( MCA_bus ) { 5795 /* The PS/2 uses level-triggered interrupts. You * 5796 * can't turn them off, nor would you want to (any 5797 * attempt to enable edge-triggered interrupts 5798 * usually gets intercepted by a special hardware 5799 * circuit). Hence we have to acknowledge the timer 5800 * interrupt. Through some incredibly stupid design 5801 * idea, the reset for IRQ 0 is done by setting the 5802 * high bit of the PPI port B (0x61). Note that some 5803 * PS/2s, notably the 55SX, work fine if this is 5804 * removed. */ 5805 irq = inb_p( 0x61 ); /* read the current state */ 5806 outb_p( irq|0x80, 0x61 ); /* reset the IRQ */ 5807 } 5808 #endif 5809 } 5810 5811 static int use_tsc = 0; 5812 5813 /* This is the same as the above, except we _also_ save 5814 * the current Time Stamp Counter value at the time of 5815 * the timer interrupt, so that we later on can estimate 5816 * the time of day more exactly. */ 5817 static void timer_interrupt(int irq, void *dev_id, 5818 struct pt_regs *regs) 5819 { 5820 int count; 5821 5822 /* Here we are in the timer irq handler. We just have 5823 * irqs locally disabled but we don't know if the 5824 * timer_bh is running on the other CPU. We need to 5825 * avoid to SMP race with it. NOTE: we don' t need the 5826 * irq version of write_lock because as just said we 5827 * have irq locally disabled. -arca */ 5828 write_lock(&xtime_lock); 5829 5830 if (use_tsc) 5831 { 5832 /* It is important that these two operations happen 5833 * almost at the same time. We do the RDTSC stuff 5834 * first, since it's faster. To avoid any 5835 * inconsistencies, we need interrupts disabled 5836 * locally. */ 5837 5838 /* Interrupts are just disabled locally since the 5839 * timer irq has the SA_INTERRUPT flag set. -arca */ 5840 5841 /* read Pentium cycle counter */ 5842 __asm__("rdtsc" : "=a" (last_tsc_low) : : "edx"); 5843 5844 outb_p(0x00, 0x43); /* latch the count ASAP */ 5845 5846 count = inb_p(0x40); /* read the latched count */ 5847 count |= inb(0x40) << 8; 5848 5849 count = ((LATCH-1) - count) * TICK_SIZE; 5850 delay_at_last_interrupt = (count + LATCH/2) / LATCH; 5851 } 5852 5853 do_timer_interrupt(irq, NULL, regs); 5854 5855 write_unlock(&xtime_lock); 5856 5857 } 5858 5859 /* Converts Gregorian date to seconds since 1970-01-01 5860 * 00:00:00. Assumes input in normal date format, 5861 * i.e. 1980-12-31 23:59:59 => year=1980, mon=12, day=31, 5862 * hour=23, min=59, sec=59. 5863 * 5864 * [For the Julian calendar (which was used in Russia 5865 * before 1917, Britain & colonies before 1752, anywhere 5866 * else before 1582, and is still in use by some 5867 * communities) leave out the -year/100+year/400 terms, 5868 * and add 10.] 5869 * 5870 * This algorithm was first published by Gauss (I think). 5871 * 5872 * WARNING: this function will overflow on 2106-02-07 5873 * 06:28:16 on machines were long is 32-bit! (However, as 5874 * time_t is signed, we will already get problems at 5875 * other places on 2038-01-19 03:14:08) */ 5876 static inline unsigned long mktime( 5877 unsigned int year, unsigned int mon, 5878 unsigned int day, unsigned int hour, 5879 unsigned int min, unsigned int sec) 5880 { 5881 if (0 >= (int) (mon -= 2)) { /* 1..12 -> 11,12,1..10 */ 5882 mon += 12; /* Puts Feb last since it has leap day */ 5883 year -= 1; 5884 } 5885 return ((( 5886 (unsigned long)(year/4 - year/100 + year/400 + 5887 367*mon/12 + day) + year*365 - 719499 5888 )*24 + hour /* now have hours */ 5889 )*60 + min /* now have minutes */ 5890 )*60 + sec; /* finally seconds */ 5891 } 5892 5893 /* not static: needed by APM */ 5894 unsigned long get_cmos_time(void) 5895 { 5896 unsigned int year, mon, day, hour, min, sec; 5897 int i; 5898 5899 /* The Linux interpretation of the CMOS clock register 5900 * contents: When the Update-In-Progress (UIP) flag 5901 * goes from 1 to 0, the RTC registers show the second 5902 * which has precisely just started. Let's hope other 5903 * operating systems interpret the RTC the same way. */ 5904 /* read RTC exactly on falling edge of update flag */ 5905 /* may take up to 1 second... */ 5906 for (i = 0 ; i < 1000000 ; i++) 5907 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP) 5908 break; 5909 /* must try at least 2.228 ms */ 5910 for (i = 0 ; i < 1000000 ; i++) 5911 if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)) 5912 break; 5913 /* Isn't this overkill? 5914 * UIP above should guarantee consistency */ 5915 do { 5916 sec = CMOS_READ(RTC_SECONDS); 5917 min = CMOS_READ(RTC_MINUTES); 5918 hour = CMOS_READ(RTC_HOURS); 5919 day = CMOS_READ(RTC_DAY_OF_MONTH); 5920 mon = CMOS_READ(RTC_MONTH); 5921 year = CMOS_READ(RTC_YEAR); 5922 } while (sec != CMOS_READ(RTC_SECONDS)); 5923 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) 5924 RTC_ALWAYS_BCD) { 5925 BCD_TO_BIN(sec); 5926 BCD_TO_BIN(min); 5927 BCD_TO_BIN(hour); 5928 BCD_TO_BIN(day); 5929 BCD_TO_BIN(mon); 5930 BCD_TO_BIN(year); 5931 } 5932 if ((year += 1900) < 1970) 5933 year += 100; 5934 return mktime(year, mon, day, hour, min, sec); 5935 } 5936 5937 static struct irqaction irq0 = 5938 { timer_interrupt, SA_INTERRUPT, 0, "timer", NULL, NULL}; 5939 5940 /* ------ Calibrate the TSC ------- 5941 * Return 2^32 * (1 / (TSC clocks per usec)) for 5942 * do_fast_gettimeoffset(). Too much 64-bit arithmetic 5943 * here to do this cleanly in C, and for accuracy's sake 5944 * we want to keep the overhead on the CTC speaker 5945 * (channel 2) output busy loop as low as possible. We 5946 * avoid reading the CTC registers directly because of 5947 * the awkward 8-bit access mechanism of the 82C54 5948 * device. */ 5949 5950 #define CALIBRATE_LATCH (5 * LATCH) 5951 #define CALIBRATE_TIME (5 * 1000020/HZ) 5952 5953 __initfunc(static unsigned long calibrate_tsc(void)) 5954 { 5955 /* Set the Gate high, disable speaker */ 5956 outb((inb(0x61) & ~0x02) | 0x01, 0x61); 5957 5958 /* Now let's take care of CTC channel 2 5959 * 5960 * Set the Gate high, program CTC channel 2 for mode 0, 5961 * (interrupt on terminal count mode), binary count, 5962 * load 5 * LATCH count, (LSB and MSB) to begin 5963 * countdown. */ 5964 outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */ 5965 outb(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */ 5966 outb(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */ 5967 5968 { 5969 unsigned long startlow, starthigh; 5970 unsigned long endlow, endhigh; 5971 unsigned long count; 5972 5973 __asm__ __volatile__("rdtsc":"=a" (startlow),"=d" 5974 (starthigh)); 5975 count = 0; 5976 do { 5977 count++; 5978 } while ((inb(0x61) & 0x20) == 0); 5979 __asm__ __volatile__("rdtsc":"=a" (endlow),"=d" 5980 (endhigh)); 5981 5982 last_tsc_low = endlow; 5983 5984 /* Error: ECTCNEVERSET */ 5985 if (count <= 1) 5986 goto bad_ctc; 5987 5988 /* 64-bit subtract - gcc just messes up with long 5989 * longs */ 5990 __asm__("subl %2,%0\n\t" 5991 "sbbl %3,%1" 5992 :"=a" (endlow), "=d" (endhigh) 5993 :"g" (startlow), "g" (starthigh), 5994 "0" (endlow), "1" (endhigh)); 5995 5996 /* Error: ECPUTOOFAST */ 5997 if (endhigh) 5998 goto bad_ctc; 5999 6000 /* Error: ECPUTOOSLOW */ 6001 if (endlow <= CALIBRATE_TIME) 6002 goto bad_ctc; 6003 6004 __asm__("divl %2" 6005 :"=a" (endlow), "=d" (endhigh) 6006 :"r" (endlow), "0" (0), "1" (CALIBRATE_TIME)); 6007 6008 return endlow; 6009 } 6010 6011 /* The CTC wasn't reliable: we got a hit on the very 6012 * first read, or the CPU was so fast/slow that the 6013 * quotient wouldn't fit in 32 bits.. */ 6014 bad_ctc: 6015 return 0; 6016 } 6017 6018 __initfunc(void time_init(void)) 6019 { 6020 xtime.tv_sec = get_cmos_time(); 6021 xtime.tv_usec = 0; 6022 6023 /* If we have APM enabled or the CPU clock speed is 6024 * variable (CPU stops clock on HLT or slows clock to 6025 * save power) then the TSC timestamps may diverge by up 6026 * to 1 jiffy from 'real time' but nothing will break. 6027 * The most frequent case is that the CPU is "woken" from 6028 * a halt state by the timer interrupt itself, so we get 6029 * 0 error. In the rare cases where a driver would "wake" 6030 * the CPU and request a timestamp, the maximum error is 6031 * < 1 jiffy. But timestamps are still perfectly ordered. 6032 * Note that the TSC counter will be reset if APM 6033 * suspends to disk; this won't break the kernel, though, 6034 * 'cuz we're smart. See arch/i386/kernel/apm.c. */ 6035 /* Firstly we have to do a CPU check for chips with a 6036 * potentially buggy TSC. At this point we haven't run 6037 * the ident/bugs checks so we must run this hook as it 6038 * may turn off the TSC flag. 6039 * 6040 * NOTE: this doesn't yet handle SMP 486 machines where 6041 * only some CPU's have a TSC. Thats never worked and 6042 * nobody has moaned if you have the only one in the 6043 * world - you fix it! */ 6044 6045 dodgy_tsc(); 6046 6047 if (boot_cpu_data.x86_capability & X86_FEATURE_TSC) { 6048 unsigned long tsc_quotient = calibrate_tsc(); 6049 if (tsc_quotient) { 6050 fast_gettimeoffset_quotient = tsc_quotient; 6051 use_tsc = 1; 6052 #ifndef do_gettimeoffset 6053 do_gettimeoffset = do_fast_gettimeoffset; 6054 #endif 6055 do_get_fast_time = do_gettimeofday; 6056 6057 /* report CPU clock rate in Hz. The formula is 6058 * (10^6 * 2^32) / (2^32 * 1 / (clocks/us)) = 6059 * clock/second. Our precision is about 100 ppm. */ 6060 { unsigned long eax=0, edx=1000000; 6061 __asm__("divl %2" 6062 :"=a" (cpu_hz), "=d" (edx) 6063 :"r" (tsc_quotient), 6064 "0" (eax), "1" (edx)); 6065 printk("Detected %ld Hz processor.\n", cpu_hz); 6066 } 6067 } 6068 } 6069 6070 #ifdef CONFIG_VISWS 6071 printk("Starting Cobalt Timer system clock\n"); 6072 6073 /* Set the countdown value */ 6074 co_cpu_write(CO_CPU_TIMEVAL, CO_TIME_HZ/HZ); 6075 6076 /* Start the timer */ 6077 co_cpu_write(CO_CPU_CTRL, 6078 co_cpu_read(CO_CPU_CTRL)|CO_CTRL_TIMERUN); 6079 6080 /* Enable (unmask) the timer interrupt */ 6081 co_cpu_write(CO_CPU_CTRL, 6082 co_cpu_read(CO_CPU_CTRL) & ~CO_CTRL_TIMEMASK); 6083 6084 /* Wire cpu IDT entry to s/w handler (and Cobalt APIC 6085 * to IDT) */ 6086 setup_x86_irq(CO_IRQ_TIMER, &irq0); 6087 #else 6088 setup_x86_irq(0, &irq0); 6089 #endif 6090 }




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